A transistor, such as a field effect transistor (“FET”) formed on a silicon-on-insulator (“SOI”) substrate, can exhibit “self-heating” under DC operation. “Self-heating” refers to an increase in the temperature of a transistor, such as an SOI transistor, over ambient temperature that can occur under DC operation as a result of large power generation and poor thermal conductivity of the transistor. As a result of self-heating, I-V characteristics obtained during DC measurements of the transistor may not accurately represent the actual I-V response of the transistor under AC operation. Consequently, self-heating can cause inaccuracies in a transistor model based on I-V characteristics obtained under transistor DC operation. Therefore, to extract an accurate transistor model for use in circuit design, it is necessary to obtain “self-heating free” I-V characteristics of the transistor.
Conventional methods for obtaining the self-heating free I-V characteristics of a transistor, such as an SOI transistor, have been inefficient and inaccurate. For example, a conventional approach uses nanosecond short pulse measurement to reconstruct a self-heating free I-V curve by injecting a short voltage pulse and measuring the current flowing from the transistor's drain. However, this conventional approach requires a complicated setup and does not necessarily yield results accurate enough for transistor model extraction. Another conventional approach uses AC conductance integration to extract self-heating free I-V curves. In the AC conductance integration approach, the output and drain impedances of a transistor are measured at different frequencies, and then the thermal capacitance is extracted based on mathematical assumptions. However, AC conductance integration is not effective for modeling the self-heating free I-V characteristics of a transistor, and is even less accurate than the nanosecond pulse approach.